The STM32MP157C/F devices are based on the high-performance dual-core Arm® Cortex®-A7 32-bit RISC core operating at up to 800 MHz. The Cortex-A7 processor includes a 32-Kbyte L1 instruction cache for each CPU, a 32-Kbyte L1 data cache for each CPU and a 256-Kbyte level2 cache. The Cortex-A7 processor is a very energy-efficient application processor designed to provide rich performance in high-end wearables, and other low-power embedded and consumer applications. It provides up to 20% more single thread performance than the Cortex-A5 and provides similar performance than the CortexA9.
The Cortex-A7 incorporates all features of the high-performance Cortex-A15 and CortexA17 processors, including virtualization support in hardware, NEON™, and 128-bit AMBA®4
AXI bus interface. The STM32MP157C/F devices also embed a Cortex® -M4 32-bit RISC core operating at up to 209 MHz frequency. Cortex-M4 core features a floating point unit (FPU) single precision which supports Arm® single-precision data-processing instructions and data types. The Cortex® -M4 supports a full set of DSP instructions and a memory protection unit (MPU)
which enhances application security. The STM32MP157C/F devices also embed a 3D graphic processing unit (Vivante® – OpenGL® ES 2.0) running at up to 533 MHz, with performances up to 26 Mtriangle/s, 133 Mpixel/s. The STM32MP157C/F devices provide an external SDRAM interface supporting external memories up to 8-Gbit density (1 Gbyte), 16 or 32-bit LPDDR2/LPDDR3 or DDR3/DDR3L up to 533 MHz. The STM32MP157C/F devices incorporate high-speed embedded memories with 708 Kbytes of Internal SRAM (including 256 Kbytes of AXI SYSRAM, 3 banks of 128 Kbytes each of AHB SRAM, 64 Kbytes of AHB SRAM in backup domain and 4 Kbytes of SRAM in backup domain), as well as an extensive range of enhanced I/Os and peripherals connected to APB buses, AHB buses, a 32-bit multi-AHB bus matrix and a 64-bit multi layer AXI interconnect supporting internal and external memories access.
All the devices offer two ADCs, two DACs, a low-power RTC, 12 general-purpose 16-bit timers, two PWM timers for motor control, five low-power timers, a true random number generator (RNG), and a cryptographic acceleration cell. The devices support six digital filters for external sigma delta modulators (DFSDM). They also feature standard and advanced communication interfaces.
• Standard peripherals
– Six I2Cs
– Four USARTs and four UARTs
– Six SPIs, three I2Ss full-duplex master/slave. To achieve audio class accuracy, the
I2S peripherals can be clocked via a dedicated internal audio PLL or via an external clock to allow synchronization.
– Four SAI serial audio interfaces
– One SPDIF Rx interface
– Management data input/output slave (MDIOS)
– Three SDMMC interfaces
– An USB high-speed Host with two ports two high-speed PHYs and a USB OTG high-speed with full-speed PHY or high-speed PHY shared with second port of USB Host.
– Two FDCAN interface, including one supporting TTCAN mode
– A Gigabit Ethernet interface
– HDMI-CEC
• Advanced peripherals including
– A flexible memory control (FMC) interface
– A Quad-SPI flash memory interface
– A camera interface for CMOS sensors
– An LCD-TFT display controller
– A DSI Host interface.
Refer to Table 1: STM32MP157C/F features and peripheral counts for the list of peripherals available on each part number. A comprehensive set of power-saving mode allows the design of low power applications. The STM32MP157C/F devices are proposed in 4 packages ranging from 257 to 448 balls with pitch 0.5 mm to 0.8 mm. The set of included peripherals changes with the device chosen. These features make the STM32MP157C/F suitable for a wide range of consumer, industrial, white goods and medical applications
